MohammadHossein AskariHemmat

I am a Phd student at Ecole Polytechnique de Montreal . I am working under supervision of Jean-Pierre David and Yvon Savaria I have receieved my Masters in Electrical and Computer Engineering and my Bachelors in Electrical Engineering from Concordia University and Shahid Bahonar University respectively. Prior to my PhD, I worked as an ASIC Verification Engineer at Microsemi and as a Software Engineer at Tru Simulation + Training.

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prl
Research

My main area of research is making Deep Neural Networks more computationally efficient. I approach this problem by proposing new algorithms and custom hardwares.




Projects
prl RISC-V Barrel Processor for Deep Neural Network Acceleration
ISCAS 2021
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Based on the architecture proposed in our FCCM 2020 paper, we built a RISC-V core that is connected to a neural network accelerator capable of performing Matrix Vector product. We used this system to compute a GEMV operation with an input matrix size of 8 by 128 and a weight matrix size of 128 by 128 with two-bit precision in only 16 clock cycles.

prl Deeplite NeutrinoTM: A BlackBox Framework for Constrained Deep Learning Model Optimization
Won IAAI Deployed Application Award!
AAAI 2021 (IAAI Technical Track)
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In this work, we introduce a black-box framework, Deeplite Neutrino^{TM} for production-ready optimization of deep learning models. The framework provides an easy mechanism for the end-users to provide constraints such as a tolerable drop in accuracy or target size of the optimized models, to guide the whole optimization process

prl RISC-V Barrel Processor for Accelerator Control
FCCM 2020
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In this paper we designed a Barrel RISC-V processor. We used 8 harts (hardware threads) to control 8 Matrix Vector Units for a Deep Neural Network application. We have implemented our design on a Xilinx Ultrascale FPGA. Our 8-hart barrel processor runs at 350 MHz with CPI of 1 and consumes 0.287W.

prl U-Net Fixed Point Quantization For Medical Image Segmentation
MICCAI 2019
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In this work, we present a fixed point quantization method for the U-Net architecture, a popular model in medical image segmentation. We then applied our quantization algorithm to three different datasets and comapred our results with the existing work. Our quantization method is more flexible (different quantization level is possible) compared to existing work.





Talks/Workshops

prl BARVINN: Barrel RISC-V Neural Network Accelerator
Accelerating AI 2021 – Challenges and Opportunities in Cloud and Edge Computing, May 4th
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In this presentation, I talked about BARVINN, a Barrel RISC-V Neural Network Accelerator.

prl Hardware Aware Acceleration For Deep Neural Network
CMC Workshop: Accelerating AI - Challenges and Opportunities in Cloud and Edge Computing, Mar 6th, 2020
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In this presentation, I talked about how to accelerate computation in Deep Neural Networks. Specifically, I talked about Quantization. Quantization in Deep Learning is a technique to reduce power, memory and computation time of deep neural networks. I talked about how one can improve the performance of a DNN using both software and hardware solutions.

prl Workshop on New Methods on Designing Digital Systems
CMC Workshop: Accelerating AI - Challenges and Opportunities in Cloud and Edge Computing, Mar 6th, 2020
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In this workshop, I reviewed the most popular open source tools for design and simulation of digital systems. The attendants got a chance to use these tools and developed a simple circuit to calculate GCD. In the second part of the workshop, I talked about RISC-V and Chisel. At the end of the workshop, the attendants got a chance to use chisel to designa and simulate a 3-stage pipelined RISC-V core.


Thanks Jon!